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Silicon program · 2030

ServLogi's path to owning the full stack by 2030.

We own the buildings, the cages, the racks, and the boards. The processor is the remaining dependency in the stack. Our 2030 program closes it with ServLogi-designed silicon, fabricated and packaged in the United States, with a root of trust we author rather than inherit.

2030
Target for fleet production silicon
5 of 6
Stack layers owned outright today
100%
US design, fab, and packaging
0
Offshore firmware dependencies
The thesis

You cannot attest to what you do not control

Every accreditation we hold rests on a chain of custody. Today that chain runs through processors we buy, firmware we did not write, and supply lines we can describe but not govern. Owning the silicon turns a set of vendor assurances into something we can evidence ourselves, on demand, for the agencies that ask.

Provenance we can prove

A part number is not a provenance record. When the die, the mask set, the packaging line, and the firmware are all ours, the supply chain question stops being a questionnaire and becomes an artifact we hand to your assessor.

A root of trust we author

Measured boot is only as trustworthy as the party that holds the first key. Our secure element puts that key inside a device we designed, so attestation starts at a boundary we control instead of one we license.

Shaped by the workloads we run

We know exactly what runs in our cages: encrypted enclave traffic, telemetry ingest, and AI inference against regulated data. A processor designed against that profile spends its transistor budget on memory encryption and cryptographic throughput rather than on features our customers never enable.

Vertical integration

Six layers, five of them already ours

Vertical integration is not a slogan here, it is an inventory. This is what ServLogi owns today and what the 2030 program adds.

  1. 01

    Facilities and cages

    Twelve US facilities with biometric-access, single-tenant cages staffed by vetted US persons.

    Owned today
  2. 02

    Power, cooling, and racks

    Our own rack designs, busways, and direct-to-chip liquid loops, specified for sustained AI-class draw rather than burst.

    Owned today
  3. 03

    Network and transit

    Dedicated private transit, BGP-based scrubbing at the edge, and cross-facility paths we light ourselves.

    Owned today
  4. 04

    Boards and baseboard management

    ServLogi board designs with our own BMC image, so out-of-band management is not a third-party black box on your management plane.

    Owned today
  5. 05

    Firmware and root of trust

    Open, auditable boot firmware today, moving to a ServLogi secure element that holds the first measurement in hardware we designed.

    2027 target
  6. 06

    CPU and accelerators

    A ServLogi processor with memory encryption, enclave isolation, and cryptographic acceleration designed against our own workload traces.

    2030 target
Roadmap

Four years, five gates

Each gate has to clear on its own evidence before the next one is funded. Dates are targets held against hardware lead times and accreditation cycles, and we publish revisions here rather than quietly moving them.

  1. 2026

    Baseline and instrumentation

    Full workload tracing across the production fleet: enclave memory traffic, telemetry ingest, and inference patterns. The trace set becomes the specification the processor is designed against. Board and BMC ownership completes in the same year.

    Status: complete
  2. 2027

    Root of trust tape-out

    First ServLogi part reaches silicon: a secure element that anchors measured boot and holds platform keys. Small die, mature process node, deliberately unambitious. It proves the design, verification, and US fabrication pipeline on a part whose failure mode we can absorb.

    Status: in progress
  3. 2028

    Processor tape-out and first samples

    The CPU itself goes to fab. Silicon comes back to a bring-up lab already running our firmware and our BMC, on our board design, in a rack we built. First samples are for characterization only and never carry customer workloads.

    Gate: functional silicon, thermal envelope confirmed
  4. 2029

    Validation and evaluation

    Cryptographic modules go to a NIST-accredited lab for FIPS 140-3 validation, and the platform enters evaluation against the control families our customers inherit. Pilot racks run internal workloads only, under the same telemetry and containment we apply to production.

    Gate: FIPS 140-3 validation, boundary re-assessment
  5. 2030

    Production fleet

    New deployments default to ServLogi silicon, with commodity hosts kept in the fleet for customers whose accreditation packages name a specific platform. Existing customers move on their own schedule, at their own contract terms, or not at all.

    Gate: production authorization, customer opt-in
For federal customers

What changes for you, and what does not

Supply chain evidence
First party SBOM and hardware bill of materials from our own records
Attestation root
ServLogi secure element keys held in hardware we designed
Fabrication
United States design, fab, assembly, and test
Migration
Opt-in no forced platform change mid-term
Instruction set
Unchanged your images and toolchains carry over
Accreditation
Re-assessed boundary re-evaluated before any customer workload lands
FAQ

Common questions

All questions

No. Migration is opt-in and never happens inside a contract term you did not agree to. Commodity hosts stay in the fleet, and customers whose authorization package names a specific platform can stay on it for as long as they need.

No. The processor targets a standard 64-bit instruction set, so existing images, container builds, and toolchains carry over. The differences are below the software boundary: memory encryption, enclave isolation, and the attestation path.

We do today, and it works. What it cannot give us is first-party evidence. When an agency asks who touched the firmware or where the die was packaged, a purchased platform gives us a vendor attestation to forward. Our own silicon gives us records to produce.

The date moves and we say so on this page. Silicon schedules slip for reasons no amount of planning removes, and a program this long that never revises its dates is not being run honestly. Nothing about the roadmap changes the service you are contracted for.

Not for contracted terms, which are fixed for their duration. Program costs are carried against the long-horizon government agreements that make a four-year hardware effort financeable in the first place. See pricing for how engagements are scoped.

Next steps

Take the next step

The 2030 silicon program is a roadmap, not a product you can order today. What you can do now is see what it is being built on top of.

Request a program briefing

For agencies and cleared contractors whose planning horizon reaches the program years, we will walk the roadmap and its dependencies in detail.

Contact federal operations

See what runs today

Current hosts use AMD SEV-SNP for hardware-enforced isolation. That platform is in production now and is not waiting on the silicon program.

View infrastructure specs

Read the attestation research

Our engineering note on hardware attestation covers the verification model the program builds on, including how to check a report yourself.

Read the engineering note